diff options
Diffstat (limited to 'include/spirv/unified1/spirv.lua')
| -rw-r--r-- | include/spirv/unified1/spirv.lua | 53 |
1 files changed, 52 insertions, 1 deletions
diff --git a/include/spirv/unified1/spirv.lua b/include/spirv/unified1/spirv.lua index 2f5e803..a3d47e9 100644 --- a/include/spirv/unified1/spirv.lua +++ b/include/spirv/unified1/spirv.lua @@ -26,7 +26,7 @@ -- the Binary Section of the SPIR-V specification. -- Enumeration tokens for SPIR-V, in various styles: --- C, C++, C++11, JSON, Lua, Python, C#, D +-- C, C++, C++11, JSON, Lua, Python, C#, D, Beef -- -- - C will have tokens with a "Spv" prefix, e.g.: SpvSourceLanguageGLSL -- - C++ will have tokens in the "spv" name space, e.g.: spv::SourceLanguageGLSL @@ -36,6 +36,8 @@ -- - C# will use enum classes in the Specification class located in the "Spv" namespace, -- e.g.: Spv.Specification.SourceLanguage.GLSL -- - D will have tokens under the "spv" module, e.g: spv.SourceLanguage.GLSL +-- - Beef will use enum classes in the Specification class located in the "Spv" namespace, +-- e.g.: Spv.Specification.SourceLanguage.GLSL -- -- Some tokens act like mask values, which can be OR'd together, -- while others are mutually exclusive. The mask-like ones have @@ -57,6 +59,7 @@ spv = { OpenCL_CPP = 4, HLSL = 5, CPP_for_OpenCL = 6, + SYCL = 7, }, ExecutionModel = { @@ -81,6 +84,8 @@ spv = { MissNV = 5317, CallableKHR = 5318, CallableNV = 5318, + TaskEXT = 5364, + MeshEXT = 5365, }, AddressingModel = { @@ -145,11 +150,21 @@ spv = { SignedZeroInfNanPreserve = 4461, RoundingModeRTE = 4462, RoundingModeRTZ = 4463, + EarlyAndLateFragmentTestsAMD = 5017, StencilRefReplacingEXT = 5027, + StencilRefUnchangedFrontAMD = 5079, + StencilRefGreaterFrontAMD = 5080, + StencilRefLessFrontAMD = 5081, + StencilRefUnchangedBackAMD = 5082, + StencilRefGreaterBackAMD = 5083, + StencilRefLessBackAMD = 5084, + OutputLinesEXT = 5269, OutputLinesNV = 5269, + OutputPrimitivesEXT = 5270, OutputPrimitivesNV = 5270, DerivativeGroupQuadsNV = 5289, DerivativeGroupLinearNV = 5290, + OutputTrianglesEXT = 5298, OutputTrianglesNV = 5298, PixelInterlockOrderedEXT = 5366, PixelInterlockUnorderedEXT = 5367, @@ -167,6 +182,7 @@ spv = { NoGlobalOffsetINTEL = 5895, NumSIMDWorkitemsINTEL = 5896, SchedulerTargetFmaxMhzINTEL = 5903, + NamedBarrierCountINTEL = 6417, }, StorageClass = { @@ -197,6 +213,7 @@ spv = { ShaderRecordBufferNV = 5343, PhysicalStorageBuffer = 5349, PhysicalStorageBufferEXT = 5349, + TaskPayloadWorkgroupEXT = 5402, CodeSectionINTEL = 5605, DeviceOnlyINTEL = 5936, HostOnlyINTEL = 5937, @@ -466,6 +483,7 @@ spv = { PassthroughNV = 5250, ViewportRelativeNV = 5252, SecondaryViewportRelativeNV = 5256, + PerPrimitiveEXT = 5271, PerPrimitiveNV = 5271, PerViewNV = 5272, PerTaskNV = 5273, @@ -515,6 +533,8 @@ spv = { PrefetchINTEL = 5902, StallEnableINTEL = 5905, FuseLoopsInFunctionINTEL = 5907, + AliasScopeINTEL = 5914, + NoAliasINTEL = 5915, BufferLocationINTEL = 5921, IOPipeStorageINTEL = 5944, FunctionFloatingPointModeINTEL = 6080, @@ -612,6 +632,10 @@ spv = { FragmentSizeNV = 5292, FragInvocationCountEXT = 5293, InvocationsPerPixelNV = 5293, + PrimitivePointIndicesEXT = 5294, + PrimitiveLineIndicesEXT = 5295, + PrimitiveTriangleIndicesEXT = 5296, + CullPrimitiveEXT = 5299, LaunchIdKHR = 5319, LaunchIdNV = 5319, LaunchSizeKHR = 5320, @@ -645,6 +669,7 @@ spv = { SMCountNV = 5375, WarpIDNV = 5376, SMIDNV = 5377, + CullMaskKHR = 6021, }, SelectionControlShift = { @@ -767,6 +792,8 @@ spv = { MakePointerVisibleKHR = 4, NonPrivatePointer = 5, NonPrivatePointerKHR = 5, + AliasScopeINTELMask = 16, + NoAliasINTELMask = 17, }, MemoryAccessMask = { @@ -780,6 +807,8 @@ spv = { MakePointerVisibleKHR = 0x00000010, NonPrivatePointer = 0x00000020, NonPrivatePointerKHR = 0x00000020, + AliasScopeINTELMask = 0x00010000, + NoAliasINTELMask = 0x00020000, }, Scope = { @@ -937,6 +966,7 @@ spv = { FragmentFullyCoveredEXT = 5265, MeshShadingNV = 5266, ImageFootprintNV = 5282, + MeshShadingEXT = 5283, FragmentBarycentricKHR = 5284, FragmentBarycentricNV = 5284, ComputeDerivativeGroupQuadsNV = 5288, @@ -1017,6 +1047,7 @@ spv = { FPGAMemoryAccessesINTEL = 5898, FPGAClusterAttributesINTEL = 5904, LoopFuseINTEL = 5906, + MemoryAccessAliasingINTEL = 5910, FPGABufferLocationINTEL = 5920, ArbitraryPrecisionFixedPointINTEL = 5922, USMStorageClassesINTEL = 5935, @@ -1031,13 +1062,17 @@ spv = { DotProductInput4x8BitPackedKHR = 6018, DotProduct = 6019, DotProductKHR = 6019, + RayCullMaskKHR = 6020, BitInstructions = 6025, + GroupNonUniformRotateKHR = 6026, AtomicFloat32AddEXT = 6033, AtomicFloat64AddEXT = 6034, LongConstantCompositeINTEL = 6089, OptNoneINTEL = 6094, AtomicFloat16AddEXT = 6095, DebugInfoModuleINTEL = 6114, + SplitBarrierINTEL = 6141, + GroupUniformArithmeticKHR = 6400, }, RayFlagsShift = { @@ -1482,6 +1517,7 @@ spv = { OpSubgroupAllKHR = 4428, OpSubgroupAnyKHR = 4429, OpSubgroupAllEqualKHR = 4430, + OpGroupNonUniformRotateKHR = 4431, OpSubgroupReadInvocationKHR = 4432, OpTraceRayKHR = 4445, OpExecuteCallableKHR = 4446, @@ -1519,6 +1555,8 @@ spv = { OpFragmentFetchAMD = 5012, OpReadClockKHR = 5056, OpImageSampleFootprintNV = 5283, + OpEmitMeshTasksEXT = 5294, + OpSetMeshOutputsEXT = 5295, OpGroupNonUniformPartitionNV = 5296, OpWritePackedPrimitiveIndices4x8NV = 5299, OpReportIntersectionKHR = 5334, @@ -1748,6 +1786,9 @@ spv = { OpArbitraryFloatPowRINTEL = 5881, OpArbitraryFloatPowNINTEL = 5882, OpLoopControlINTEL = 5887, + OpAliasDomainDeclINTEL = 5911, + OpAliasScopeDeclINTEL = 5912, + OpAliasScopeListDeclINTEL = 5913, OpFixedSqrtINTEL = 5923, OpFixedRecipINTEL = 5924, OpFixedRsqrtINTEL = 5925, @@ -1786,6 +1827,16 @@ spv = { OpTypeStructContinuedINTEL = 6090, OpConstantCompositeContinuedINTEL = 6091, OpSpecConstantCompositeContinuedINTEL = 6092, + OpControlBarrierArriveINTEL = 6142, + OpControlBarrierWaitINTEL = 6143, + OpGroupIMulKHR = 6401, + OpGroupFMulKHR = 6402, + OpGroupBitwiseAndKHR = 6403, + OpGroupBitwiseOrKHR = 6404, + OpGroupBitwiseXorKHR = 6405, + OpGroupLogicalAndKHR = 6406, + OpGroupLogicalOrKHR = 6407, + OpGroupLogicalXorKHR = 6408, }, } |