From 000d2fa91a487a2430be8ace333f199c51467b5b Mon Sep 17 00:00:00 2001 From: Frank Barchard Date: Wed, 11 Jan 2017 12:19:13 -0800 Subject: Libyuv MIPS DSPR2 optimizations. Optimized functions: I444ToARGBRow_DSPR2 I422ToARGB4444Row_DSPR2 I422ToARGB1555Row_DSPR2 NV12ToARGBRow_DSPR2 BGRAToUVRow_DSPR2 BGRAToYRow_DSPR2 ABGRToUVRow_DSPR2 ARGBToYRow_DSPR2 ABGRToYRow_DSPR2 RGBAToUVRow_DSPR2 RGBAToYRow_DSPR2 ARGBToUVRow_DSPR2 RGB24ToARGBRow_DSPR2 RAWToARGBRow_DSPR2 RGB565ToARGBRow_DSPR2 ARGB1555ToARGBRow_DSPR2 ARGB4444ToARGBRow_DSPR2 ScaleAddRow_DSPR2 Bug-fixes in functions: ScaleRowDown2_DSPR2 ScaleRowDown4_DSPR2 BUG= Review-Url: https://codereview.chromium.org/2626123003 . --- source/convert_from.cc | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) (limited to 'source/convert_from.cc') diff --git a/source/convert_from.cc b/source/convert_from.cc index ddfa3b38..e6ff5243 100644 --- a/source/convert_from.cc +++ b/source/convert_from.cc @@ -708,6 +708,14 @@ int I420ToARGB1555(const uint8* src_y, } } #endif +#if defined(HAS_I422TOARGB1555ROW_DSPR2) + if (TestCpuFlag(kCpuHasDSPR2)) { + I422ToARGB1555Row = I422ToARGB1555Row_Any_DSPR2; + if (IS_ALIGNED(width, 4)) { + I422ToARGB1555Row = I422ToARGB1555Row_DSPR2; + } + } +#endif #if defined(HAS_I422TOARGB1555ROW_MSA) if (TestCpuFlag(kCpuHasMSA)) { I422ToARGB1555Row = I422ToARGB1555Row_Any_MSA; @@ -781,6 +789,14 @@ int I420ToARGB4444(const uint8* src_y, } } #endif +#if defined(HAS_I422TOARGB4444ROW_DSPR2) + if (TestCpuFlag(kCpuHasDSPR2)) { + I422ToARGB4444Row = I422ToARGB4444Row_Any_DSPR2; + if (IS_ALIGNED(width, 4)) { + I422ToARGB4444Row = I422ToARGB4444Row_DSPR2; + } + } +#endif #if defined(HAS_I422TOARGB4444ROW_MSA) if (TestCpuFlag(kCpuHasMSA)) { I422ToARGB4444Row = I422ToARGB4444Row_Any_MSA; -- cgit v1.2.3