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| author | Frank Barchard <fbarchard@google.com> | 2023-10-04 08:59:55 -0700 |
|---|---|---|
| committer | libyuv LUCI CQ <libyuv-scoped@luci-project-accounts.iam.gserviceaccount.com> | 2023-10-04 16:31:36 +0000 |
| commit | 709d60e6eec7938a95102a5cb1d0812e35606487 (patch) | |
| tree | 17371de230532c29174d8fac92b203498dfc2e40 /unit_test | |
| parent | a3b9c36eb96ee815c938716d7e9703604938f904 (diff) | |
| download | libyuv-709d60e6eec7938a95102a5cb1d0812e35606487.tar.gz | |
VNNI-INT8 detect
- Add kCpuHasAVXVNNIINT8 flag
- Move mips flags up a bit to make space.
~/intelsde/sde -srf -- blaze-bin/third_party/libyuv/libyuv_test --gunit_filter=*CpuHas
Note: Google Test filter = *CpuHas
[==========] Running 1 test from 1 test suite.
[----------] Global test environment set-up.
[----------] 1 test from LibYUVBaseTest
[ RUN ] LibYUVBaseTest.TestCpuHas
Cpu Flags 0x403ff1
Has X86 0x10
Has SSE2 0x20
Has SSSE3 0x40
Has SSE41 0x80
Has SSE42 0x100
Has AVX 0x200
Has AVX2 0x400
Has ERMS 0x800
Has FMA3 0x1000
Has F16C 0x2000
Has AVX512BW 0x0
Has AVX512VL 0x0
Has AVX512VNNI 0x0
Has AVX512VBMI 0x0
Has AVX512VBMI2 0x0
Has AVX512VBITALG 0x0
Has AVX512VPOPCNTDQ 0x0
Has AVXVNNIINT8 0x400000
Has GFNI 0x0
[ OK ] LibYUVBaseTest.TestCpuHas (32 ms)
INT8 supported on srf and grr
-srf Set chip-check and CPUID for Intel(R) Sierra Forest CPU
-grr Set chip-check and CPUID for Intel(R) Grand Ridge CPU
Bug: b/303434603
Change-Id: I628007929ff0518b2b36e1469b4d9aed71a9fa8f
Reviewed-on: https://chromium-review.googlesource.com/c/libyuv/libyuv/+/4912015
Reviewed-by: richard winterton <rrwinterton@gmail.com>
Commit-Queue: Frank Barchard <fbarchard@chromium.org>
Diffstat (limited to 'unit_test')
| -rw-r--r-- | unit_test/cpu_test.cc | 6 | ||||
| -rw-r--r-- | unit_test/unit_test.cc | 3 |
2 files changed, 7 insertions, 2 deletions
diff --git a/unit_test/cpu_test.cc b/unit_test/cpu_test.cc index 431343e3..cdc321cf 100644 --- a/unit_test/cpu_test.cc +++ b/unit_test/cpu_test.cc @@ -47,7 +47,6 @@ TEST_F(LibYUVBaseTest, TestCpuHas) { int has_erms = TestCpuFlag(kCpuHasERMS); int has_fma3 = TestCpuFlag(kCpuHasFMA3); int has_f16c = TestCpuFlag(kCpuHasF16C); - int has_gfni = TestCpuFlag(kCpuHasGFNI); int has_avx512bw = TestCpuFlag(kCpuHasAVX512BW); int has_avx512vl = TestCpuFlag(kCpuHasAVX512VL); int has_avx512vnni = TestCpuFlag(kCpuHasAVX512VNNI); @@ -55,6 +54,8 @@ TEST_F(LibYUVBaseTest, TestCpuHas) { int has_avx512vbmi2 = TestCpuFlag(kCpuHasAVX512VBMI2); int has_avx512vbitalg = TestCpuFlag(kCpuHasAVX512VBITALG); int has_avx512vpopcntdq = TestCpuFlag(kCpuHasAVX512VPOPCNTDQ); + int has_avxvnniint8 = TestCpuFlag(kCpuHasAVXVNNIINT8); + int has_gfni = TestCpuFlag(kCpuHasGFNI); printf("Has X86 0x%x\n", has_x86); printf("Has SSE2 0x%x\n", has_sse2); printf("Has SSSE3 0x%x\n", has_ssse3); @@ -65,7 +66,6 @@ TEST_F(LibYUVBaseTest, TestCpuHas) { printf("Has ERMS 0x%x\n", has_erms); printf("Has FMA3 0x%x\n", has_fma3); printf("Has F16C 0x%x\n", has_f16c); - printf("Has GFNI 0x%x\n", has_gfni); printf("Has AVX512BW 0x%x\n", has_avx512bw); printf("Has AVX512VL 0x%x\n", has_avx512vl); printf("Has AVX512VNNI 0x%x\n", has_avx512vnni); @@ -73,6 +73,8 @@ TEST_F(LibYUVBaseTest, TestCpuHas) { printf("Has AVX512VBMI2 0x%x\n", has_avx512vbmi2); printf("Has AVX512VBITALG 0x%x\n", has_avx512vbitalg); printf("Has AVX512VPOPCNTDQ 0x%x\n", has_avx512vpopcntdq); + printf("Has AVXVNNIINT8 0x%x\n", has_avxvnniint8); + printf("Has GFNI 0x%x\n", has_gfni); #endif #if defined(__mips__) int has_mips = TestCpuFlag(kCpuHasMIPS); diff --git a/unit_test/unit_test.cc b/unit_test/unit_test.cc index b66ebfab..9d543dee 100644 --- a/unit_test/unit_test.cc +++ b/unit_test/unit_test.cc @@ -147,6 +147,9 @@ int TestCpuEnv(int cpu_info) { if (TestEnv("LIBYUV_DISABLE_AVX512VPOPCNTDQ")) { cpu_info &= ~libyuv::kCpuHasAVX512VPOPCNTDQ; } + if (TestEnv("LIBYUV_DISABLE_AVXVNNIINT8")) { + cpu_info &= ~libyuv::kCpuHasAVXVNNIINT8; + } if (TestEnv("LIBYUV_DISABLE_GFNI")) { cpu_info &= ~libyuv::kCpuHasGFNI; } |