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| author | Frank Barchard <fbarchard@google.com> | 2016-09-22 16:12:22 -0700 |
|---|---|---|
| committer | Frank Barchard <fbarchard@google.com> | 2016-09-22 16:12:22 -0700 |
| commit | c5323b0fdc3428b9341043e8adc2c2715a227330 (patch) | |
| tree | 66ef37541c0632264ae45e3db484befcc6901286 /source/cpu_id.cc | |
| parent | 5da918b48dd42281da74ca0c84a962c89d4d1430 (diff) | |
| download | libyuv-c5323b0fdc3428b9341043e8adc2c2715a227330.tar.gz | |
Add MIPS SIMD Arch (MSA) optimized MirrorRow function
As per the preparation patch added in Chromium sources at,
2150943003: Add MIPS SIMD Arch (MSA) build flags for GYP/GN builds
This patch adds first MSA optimized function in libYUV project.
BUG=libyuv:634
R=fbarchard@google.com
Review URL: https://codereview.chromium.org/2285683002 .
Diffstat (limited to 'source/cpu_id.cc')
| -rw-r--r-- | source/cpu_id.cc | 38 |
1 files changed, 38 insertions, 0 deletions
diff --git a/source/cpu_id.cc b/source/cpu_id.cc index 84927ebc..aaf58cf0 100644 --- a/source/cpu_id.cc +++ b/source/cpu_id.cc @@ -161,6 +161,38 @@ int ArmCpuCaps(const char* cpuinfo_name) { return 0; } +LIBYUV_API SAFEBUFFERS +int MipsCpuCaps(const char* cpuinfo_name, const char ase[]) { + char cpuinfo_line[512]; + int len = strlen(ase); + FILE* f = fopen(cpuinfo_name, "r"); + if (!f) { + // ase enabled if /proc/cpuinfo is unavailable. + if(strcmp(ase, " msa") == 0) { + return kCpuHasMSA; + } + if(strcmp(ase, " dspr2") == 0) { + return kCpuHasDSPR2; + } + } + while (fgets(cpuinfo_line, sizeof(cpuinfo_line) - 1, f)) { + if (memcmp(cpuinfo_line, "ASEs implemented", 16) == 0) { + char* p = strstr(cpuinfo_line, ase); + if (p && (p[len] == ' ' || p[len] == '\n')) { + fclose(f); + if(strcmp(ase, " msa") == 0) { + return kCpuHasMSA; + } + if(strcmp(ase, " dspr2") == 0) { + return kCpuHasDSPR2; + } + } + } + } + fclose(f); + return 0; +} + // CPU detect function for SIMD instruction sets. LIBYUV_API int cpu_info_ = 0; // cpu_info is not initialized yet. @@ -254,10 +286,16 @@ int InitCpuFlags(void) { #if defined(__mips_dspr2) cpu_info |= kCpuHasDSPR2; #endif +#if defined(__mips_msa) + cpu_info = MipsCpuCaps("/proc/cpuinfo", " msa"); +#endif cpu_info |= kCpuHasMIPS; if (getenv("LIBYUV_DISABLE_DSPR2")) { cpu_info &= ~kCpuHasDSPR2; } + if (getenv("LIBYUV_DISABLE_MSA")) { + cpu_info &= ~kCpuHasMSA; + } #endif #if defined(__arm__) || defined(__aarch64__) // gcc -mfpu=neon defines __ARM_NEON__ |