cpuid for arm/mips/riscv initialize buffer

- change cpu printf to hex to better show flags

util/cpuid:
Cpu Flags 0x30000001
Has RISCV 0x10000000
Has RVV 0x20000000


[ RUN      ] LibYUVBaseTest.TestCpuHas
Cpu Flags 0x30000001
Has RISCV 0x10000000
Has RVV 0x20000000
Has RVVZVFH 0x0
[       OK ] LibYUVBaseTest.TestCpuHas (1 ms)
[ RUN      ] LibYUVBaseTest.TestCompilerMacros
__ATOMIC_RELAXED 0
__cplusplus 201703
__clang_major__ 9999
__clang_minor__ 0
__GNUC__ 4
__GNUC_MINOR__ 2
__riscv 1
__riscv_vector 1
__clang__ 1
__llvm__ 1
__pic__ 2
INT_TYPES_DEFINED
__has_feature

Bug: libyuv:956
Change-Id: Iee4f1f34799434390e756de1e6c2c4596d82ace5
Reviewed-on: https://chromium-review.googlesource.com/c/libyuv/libyuv/+/4484957
Reviewed-by: Wan-Teh Chang <wtc@google.com>
Commit-Queue: Frank Barchard <fbarchard@chromium.org>

1 files changed, 45 insertions, 45 deletions

diff --git a/source/cpu_id.cc b/source/cpu_id.cc
index d5202c8d..61de60f3 100644
--- a/source/cpu_id.cc
+++ b/source/cpu_id.cc
@@ -40,7 +40,6 @@ extern "C" {
 // cpu_info_ variable for SIMD instruction sets detected.
 LIBYUV_API int cpu_info_ = 0;
 
-// TODO(fbarchard): Consider using int for cpuid so casting is not needed.
 // Low level cpuid for X86.
 #if (defined(_M_IX86) || defined(_M_X64) || defined(__i386__) || \
      defined(__x86_64__)) &&                                     \
@@ -143,7 +142,8 @@ LIBYUV_API SAFEBUFFERS int ArmCpuCaps(const char* cpuinfo_name) {
     // This will occur for Chrome sandbox for Pepper or Render process.
     return kCpuHasNEON;
   }
-  while (fgets(cpuinfo_line, sizeof(cpuinfo_line) - 1, f)) {
+  memset(cpuinfo_line, 0, sizeof(cpuinfo_line));
+  while (fgets(cpuinfo_line, sizeof(cpuinfo_line), f)) {
     if (memcmp(cpuinfo_line, "Features", 8) == 0) {
       char* p = strstr(cpuinfo_line, " neon");
       if (p && (p[5] == ' ' || p[5] == '\n')) {
@@ -162,38 +162,9 @@ LIBYUV_API SAFEBUFFERS int ArmCpuCaps(const char* cpuinfo_name) {
   return 0;
 }
 
-// TODO(fbarchard): Consider read_msa_ir().
-LIBYUV_API SAFEBUFFERS int MipsCpuCaps(const char* cpuinfo_name) {
-  char cpuinfo_line[512];
-  int flag = 0x0;
-  FILE* f = fopen(cpuinfo_name, "re");
-  if (!f) {
-    // Assume nothing if /proc/cpuinfo is unavailable.
-    // This will occur for Chrome sandbox for Pepper or Render process.
-    return 0;
-  }
-  while (fgets(cpuinfo_line, sizeof(cpuinfo_line) - 1, f)) {
-    if (memcmp(cpuinfo_line, "cpu model", 9) == 0) {
-      // Workaround early kernel without MSA in ASEs line.
-      if (strstr(cpuinfo_line, "Loongson-2K")) {
-        flag |= kCpuHasMSA;
-      }
-    }
-    if (memcmp(cpuinfo_line, "ASEs implemented", 16) == 0) {
-      if (strstr(cpuinfo_line, "msa")) {
-        flag |= kCpuHasMSA;
-      }
-      // ASEs is the last line, so we can break here.
-      break;
-    }
-  }
-  fclose(f);
-  return flag;
-}
-
 LIBYUV_API SAFEBUFFERS int RiscvCpuCaps(const char* cpuinfo_name) {
   char cpuinfo_line[512];
-  int flag = 0x0;
+  int flag = 0;
   FILE* f = fopen(cpuinfo_name, "re");
   if (!f) {
 #if defined(__riscv_vector)
@@ -204,7 +175,8 @@ LIBYUV_API SAFEBUFFERS int RiscvCpuCaps(const char* cpuinfo_name) {
     return 0;
 #endif
   }
-  while (fgets(cpuinfo_line, sizeof(cpuinfo_line) - 1, f)) {
+  memset(cpuinfo_line, 0, sizeof(cpuinfo_line));
+  while (fgets(cpuinfo_line, sizeof(cpuinfo_line), f)) {
     if (memcmp(cpuinfo_line, "isa", 3) == 0) {
       // ISA string must begin with rv64{i,e,g} for a 64-bit processor.
       char* isa = strstr(cpuinfo_line, "rv64");
@@ -222,25 +194,23 @@ LIBYUV_API SAFEBUFFERS int RiscvCpuCaps(const char* cpuinfo_name) {
         // Find the very first occurrence of 's', 'x' or 'z'.
         // To detect multi-letter standard, non-standard, and
         // supervisor-level extensions.
-        int otherExts_len = 0;
-        char* otherExts = strpbrk(isa, "zxs");
-        if (otherExts) {
-          otherExts_len = strlen(otherExts);
+        int extensions_len = 0;
+        char* extensions = strpbrk(isa, "zxs");
+        if (extensions) {
+          extensions_len = strlen(extensions);
           // Multi-letter extensions are seperated by a single underscore
           // as described in RISC-V User-Level ISA V2.2.
-          char* ext = strtok(otherExts, "_");
+          char* ext = strtok(extensions, "_");
           while (ext) {
             // Search for the ZVFH (Vector FP16) extension.
-            // The ZVFH implied the (Scalar FP16)ZFH extension.
-            if (!strcmp(ext, "zvfh") || !strcmp(ext, "zvfh\n")) {
+            if (!strcmp(ext, "zvfh")) {
               flag |= kCpuHasRVVZVFH;
             }
             ext = strtok(NULL, "_");
           }
         }
-        const int std_isa_len = isa_len - otherExts_len - 5 - 1;
+        const int std_isa_len = isa_len - extensions_len - 5 - 1;
         // Detect the v in the standard single-letter extensions.
-        // Skip optional Zve* and Zvl* extensions detection at otherExts.
         if (memchr(isa, 'v', std_isa_len)) {
           // The RVV implied the F extension.
           flag |= kCpuHasRVV;
@@ -248,9 +218,11 @@ LIBYUV_API SAFEBUFFERS int RiscvCpuCaps(const char* cpuinfo_name) {
       }
     }
 #if defined(__riscv_vector)
+    // Assume RVV if /proc/cpuinfo is from x86 host running QEMU.
     else if ((memcmp(cpuinfo_line, "vendor_id\t: GenuineIntel", 24) == 0) ||
              (memcmp(cpuinfo_line, "vendor_id\t: AuthenticAMD", 24) == 0)) {
-      flag |= kCpuHasRVV;
+      fclose(f);
+      return kCpuHasRVV;
     }
 #endif
   }
@@ -258,14 +230,42 @@ LIBYUV_API SAFEBUFFERS int RiscvCpuCaps(const char* cpuinfo_name) {
   return flag;
 }
 
-// TODO(fbarchard): Consider read_loongarch_ir().
+LIBYUV_API SAFEBUFFERS int MipsCpuCaps(const char* cpuinfo_name) {
+  char cpuinfo_line[512];
+  int flag = 0;
+  FILE* f = fopen(cpuinfo_name, "re");
+  if (!f) {
+    // Assume nothing if /proc/cpuinfo is unavailable.
+    // This will occur for Chrome sandbox for Pepper or Render process.
+    return 0;
+  }
+  memset(cpuinfo_line, 0, sizeof(cpuinfo_line));
+  while (fgets(cpuinfo_line, sizeof(cpuinfo_line), f)) {
+    if (memcmp(cpuinfo_line, "cpu model", 9) == 0) {
+      // Workaround early kernel without MSA in ASEs line.
+      if (strstr(cpuinfo_line, "Loongson-2K")) {
+        flag |= kCpuHasMSA;
+      }
+    }
+    if (memcmp(cpuinfo_line, "ASEs implemented", 16) == 0) {
+      if (strstr(cpuinfo_line, "msa")) {
+        flag |= kCpuHasMSA;
+      }
+      // ASEs is the last line, so we can break here.
+      break;
+    }
+  }
+  fclose(f);
+  return flag;
+}
+
 #define LOONGARCH_CFG2 0x2
 #define LOONGARCH_CFG2_LSX (1 << 6)
 #define LOONGARCH_CFG2_LASX (1 << 7)
 
 #if defined(__loongarch__)
 LIBYUV_API SAFEBUFFERS int LoongarchCpuCaps(void) {
-  int flag = 0x0;
+  int flag = 0;
   uint32_t cfg2 = 0;
 
   __asm__ volatile("cpucfg %0, %1 \n\t" : "+&r"(cfg2) : "r"(LOONGARCH_CFG2));