From 68afa490ccc2fad1e3492f32119a381b9befc279 Mon Sep 17 00:00:00 2001 From: Jean-Marc Valin Date: Wed, 25 Jan 2017 21:56:48 -0500 Subject: Avoids undefined behaviour in ARM-optimized code Casting to unsigned to avoid shifting negative values left. --- celt/arm/fixed_armv4.h | 6 +++--- celt/arm/fixed_armv5e.h | 4 ++-- 2 files changed, 5 insertions(+), 5 deletions(-) (limited to 'celt/arm') diff --git a/celt/arm/fixed_armv4.h b/celt/arm/fixed_armv4.h index efb3b189..d84888a7 100644 --- a/celt/arm/fixed_armv4.h +++ b/celt/arm/fixed_armv4.h @@ -37,7 +37,7 @@ static OPUS_INLINE opus_val32 MULT16_32_Q16_armv4(opus_val16 a, opus_val32 b) "#MULT16_32_Q16\n\t" "smull %0, %1, %2, %3\n\t" : "=&r"(rd_lo), "=&r"(rd_hi) - : "%r"(b),"r"(a<<16) + : "%r"(b),"r"(SHL32(a,16)) ); return rd_hi; } @@ -54,10 +54,10 @@ static OPUS_INLINE opus_val32 MULT16_32_Q15_armv4(opus_val16 a, opus_val32 b) "#MULT16_32_Q15\n\t" "smull %0, %1, %2, %3\n\t" : "=&r"(rd_lo), "=&r"(rd_hi) - : "%r"(b), "r"(a<<16) + : "%r"(b), "r"(SHL32(a,16)) ); /*We intentionally don't OR in the high bit of rd_lo for speed.*/ - return rd_hi<<1; + return SHL32(rd_hi,1); } #define MULT16_32_Q15(a, b) (MULT16_32_Q15_armv4(a, b)) diff --git a/celt/arm/fixed_armv5e.h b/celt/arm/fixed_armv5e.h index 36a63211..6bf73cba 100644 --- a/celt/arm/fixed_armv5e.h +++ b/celt/arm/fixed_armv5e.h @@ -59,7 +59,7 @@ static OPUS_INLINE opus_val32 MULT16_32_Q15_armv5e(opus_val16 a, opus_val32 b) : "=r"(res) : "r"(b), "r"(a) ); - return res<<1; + return SHL32(res,1); } #define MULT16_32_Q15(a, b) (MULT16_32_Q15_armv5e(a, b)) @@ -76,7 +76,7 @@ static OPUS_INLINE opus_val32 MAC16_32_Q15_armv5e(opus_val32 c, opus_val16 a, "#MAC16_32_Q15\n\t" "smlawb %0, %1, %2, %3;\n" : "=r"(res) - : "r"(b<<1), "r"(a), "r"(c) + : "r"(SHL32(b,1)), "r"(a), "r"(c) ); return res; } -- cgit v1.2.3