diff options
| author | Radu Velea <radu.velea@intel.com> | 2015-10-27 12:21:36 +0200 |
|---|---|---|
| committer | Timothy B. Terriberry <tterribe@xiph.org> | 2015-11-05 01:23:05 -0800 |
| commit | 1632152b83b8ab4e28393bca94450796b71b0201 (patch) | |
| tree | 9d70a379010a47f5c203bad841dca40257619e14 /celt/x86 | |
| parent | bb0e1e0d6f6b112160a10de84ba368689c41c1bb (diff) | |
| download | libopus-1632152b83b8ab4e28393bca94450796b71b0201.tar.gz | |
Adding AVX config switches
Signed-off-by: Timothy B. Terriberry <tterribe@xiph.org>
Diffstat (limited to 'celt/x86')
| -rw-r--r-- | celt/x86/x86_celt_map.c | 7 | ||||
| -rw-r--r-- | celt/x86/x86cpu.c | 10 |
2 files changed, 17 insertions, 0 deletions
diff --git a/celt/x86/x86_celt_map.c b/celt/x86/x86_celt_map.c index 1ed2acbc..8e5e4492 100644 --- a/celt/x86/x86_celt_map.c +++ b/celt/x86/x86_celt_map.c @@ -53,6 +53,7 @@ void (*const CELT_FIR_IMPL[OPUS_ARCHMASK + 1])( celt_fir_c, celt_fir_c, MAY_HAVE_SSE4_1(celt_fir), /* sse4.1 */ + MAY_HAVE_SSE4_1(celt_fir) /* avx */ }; void (*const XCORR_KERNEL_IMPL[OPUS_ARCHMASK + 1])( @@ -65,6 +66,7 @@ void (*const XCORR_KERNEL_IMPL[OPUS_ARCHMASK + 1])( xcorr_kernel_c, xcorr_kernel_c, MAY_HAVE_SSE4_1(xcorr_kernel), /* sse4.1 */ + MAY_HAVE_SSE4_1(xcorr_kernel) /* avx */ }; #endif @@ -81,6 +83,7 @@ opus_val32 (*const CELT_INNER_PROD_IMPL[OPUS_ARCHMASK + 1])( celt_inner_prod_c, MAY_HAVE_SSE2(celt_inner_prod), MAY_HAVE_SSE4_1(celt_inner_prod), /* sse4.1 */ + MAY_HAVE_SSE4_1(celt_inner_prod) /* avx */ }; #endif @@ -99,6 +102,7 @@ void (*const XCORR_KERNEL_IMPL[OPUS_ARCHMASK + 1])( MAY_HAVE_SSE(xcorr_kernel), MAY_HAVE_SSE(xcorr_kernel), MAY_HAVE_SSE(xcorr_kernel), + MAY_HAVE_SSE(xcorr_kernel) }; opus_val32 (*const CELT_INNER_PROD_IMPL[OPUS_ARCHMASK + 1])( @@ -110,6 +114,7 @@ opus_val32 (*const CELT_INNER_PROD_IMPL[OPUS_ARCHMASK + 1])( MAY_HAVE_SSE(celt_inner_prod), MAY_HAVE_SSE(celt_inner_prod), MAY_HAVE_SSE(celt_inner_prod), + MAY_HAVE_SSE(celt_inner_prod) }; void (*const DUAL_INNER_PROD_IMPL[OPUS_ARCHMASK + 1])( @@ -124,6 +129,7 @@ void (*const DUAL_INNER_PROD_IMPL[OPUS_ARCHMASK + 1])( MAY_HAVE_SSE(dual_inner_prod), MAY_HAVE_SSE(dual_inner_prod), MAY_HAVE_SSE(dual_inner_prod), + MAY_HAVE_SSE(dual_inner_prod) }; void (*const COMB_FILTER_CONST_IMPL[OPUS_ARCHMASK + 1])( @@ -139,6 +145,7 @@ void (*const COMB_FILTER_CONST_IMPL[OPUS_ARCHMASK + 1])( MAY_HAVE_SSE(comb_filter_const), MAY_HAVE_SSE(comb_filter_const), MAY_HAVE_SSE(comb_filter_const), + MAY_HAVE_SSE(comb_filter_const) }; diff --git a/celt/x86/x86cpu.c b/celt/x86/x86cpu.c index f850715e..1a73dd1f 100644 --- a/celt/x86/x86cpu.c +++ b/celt/x86/x86cpu.c @@ -91,6 +91,8 @@ typedef struct CPU_Feature{ int HW_SSE; int HW_SSE2; int HW_SSE41; + /* SIMD: 256-bit */ + int HW_AVX; } CPU_Feature; static void opus_cpu_feature_check(CPU_Feature *cpu_feature) @@ -106,11 +108,13 @@ static void opus_cpu_feature_check(CPU_Feature *cpu_feature) cpu_feature->HW_SSE = (info[3] & (1 << 25)) != 0; cpu_feature->HW_SSE2 = (info[3] & (1 << 26)) != 0; cpu_feature->HW_SSE41 = (info[2] & (1 << 19)) != 0; + cpu_feature->HW_AVX = (info[2] & (1 << 28)) != 0; } else { cpu_feature->HW_SSE = 0; cpu_feature->HW_SSE2 = 0; cpu_feature->HW_SSE41 = 0; + cpu_feature->HW_AVX = 0; } } @@ -140,6 +144,12 @@ int opus_select_arch(void) } arch++; + if (!cpu_feature.HW_AVX) + { + return arch; + } + arch++; + return arch; } |