aboutsummaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorSidorov, Dmitry <dmitry.sidorov@intel.com>2022-10-17 07:00:53 -0700
committerSidorov, Dmitry <dmitry.sidorov@intel.com>2022-10-17 07:07:25 -0700
commitb3e7b513754ab9eda285f428e817c21feca9b88c (patch)
treedd44124a5c248742004ef72996e1d248b246ff6d
parent62269acdbf30e355c320c19e1ba0996ae8cfdf5d (diff)
downloadspirv-headers-b3e7b513754ab9eda285f428e817c21feca9b88c.tar.gz
Add SPV_INTEL_fpga_invocation_pipelining_attributes
Spec: https://github.com/KhronosGroup/SPIRV-Registry/blob/main/extensions/INTEL/SPV_INTEL_fpga_invocation_pipelining_attributes.asciidoc Signed-off-by: Sidorov, Dmitry <dmitry.sidorov@intel.com>
-rw-r--r--include/spirv/unified1/spirv.bf4
-rw-r--r--include/spirv/unified1/spirv.core.grammar.json33
-rw-r--r--include/spirv/unified1/spirv.cs4
-rw-r--r--include/spirv/unified1/spirv.h4
-rw-r--r--include/spirv/unified1/spirv.hpp4
-rw-r--r--include/spirv/unified1/spirv.hpp114
-rw-r--r--include/spirv/unified1/spirv.json4
-rw-r--r--include/spirv/unified1/spirv.lua4
-rw-r--r--include/spirv/unified1/spirv.py4
-rw-r--r--include/spirv/unified1/spv.d4
10 files changed, 69 insertions, 0 deletions
diff --git a/include/spirv/unified1/spirv.bf b/include/spirv/unified1/spirv.bf
index c8d8722..563b61e 100644
--- a/include/spirv/unified1/spirv.bf
+++ b/include/spirv/unified1/spirv.bf
@@ -561,6 +561,9 @@ namespace Spv
FuseLoopsInFunctionINTEL = 5907,
AliasScopeINTEL = 5914,
NoAliasINTEL = 5915,
+ InitiationIntervalINTEL = 5917,
+ MaxConcurrencyINTEL = 5918,
+ PipelineEnableINTEL = 5919,
BufferLocationINTEL = 5921,
IOPipeStorageINTEL = 5944,
FunctionFloatingPointModeINTEL = 6080,
@@ -1102,6 +1105,7 @@ namespace Spv
FPGAClusterAttributesINTEL = 5904,
LoopFuseINTEL = 5906,
MemoryAccessAliasingINTEL = 5910,
+ FPGAInvocationPipeliningAttributesINTEL = 5916,
FPGABufferLocationINTEL = 5920,
ArbitraryPrecisionFixedPointINTEL = 5922,
USMStorageClassesINTEL = 5935,
diff --git a/include/spirv/unified1/spirv.core.grammar.json b/include/spirv/unified1/spirv.core.grammar.json
index cea1254..f51deb1 100644
--- a/include/spirv/unified1/spirv.core.grammar.json
+++ b/include/spirv/unified1/spirv.core.grammar.json
@@ -11965,6 +11965,33 @@
"version" : "None"
},
{
+ "enumerant" : "InitiationIntervalINTEL",
+ "value" : 5917,
+ "parameters" : [
+ { "kind" : "LiteralInteger", "name" : "'Cycles'" }
+ ],
+ "capabilities" : [ "FPGAInvocationPipeliningAttributesINTEL" ],
+ "version" : "None"
+ },
+ {
+ "enumerant" : "MaxConcurrencyINTEL",
+ "value" : 5918,
+ "parameters" : [
+ { "kind" : "LiteralInteger", "name" : "'Invocations'" }
+ ],
+ "capabilities" : [ "FPGAInvocationPipeliningAttributesINTEL" ],
+ "version" : "None"
+ },
+ {
+ "enumerant" : "PipelineEnableINTEL",
+ "value" : 5919,
+ "parameters" : [
+ { "kind" : "LiteralInteger", "name" : "'Enable'" }
+ ],
+ "capabilities" : [ "FPGAInvocationPipeliningAttributesINTEL" ],
+ "version" : "None"
+ },
+ {
"enumerant" : "BufferLocationINTEL",
"value" : 5921,
"parameters" : [
@@ -14148,6 +14175,12 @@
"version" : "None"
},
{
+ "enumerant" : "FPGAInvocationPipeliningAttributesINTEL",
+ "value" : 5916,
+ "extensions" : [ "SPV_INTEL_fpga_invocation_pipelining_attributes" ],
+ "version" : "None"
+ },
+ {
"enumerant" : "FPGABufferLocationINTEL",
"value" : 5920,
"extensions" : [ "SPV_INTEL_fpga_buffer_location" ],
diff --git a/include/spirv/unified1/spirv.cs b/include/spirv/unified1/spirv.cs
index c30d351..2c1fd1d 100644
--- a/include/spirv/unified1/spirv.cs
+++ b/include/spirv/unified1/spirv.cs
@@ -560,6 +560,9 @@ namespace Spv
FuseLoopsInFunctionINTEL = 5907,
AliasScopeINTEL = 5914,
NoAliasINTEL = 5915,
+ InitiationIntervalINTEL = 5917,
+ MaxConcurrencyINTEL = 5918,
+ PipelineEnableINTEL = 5919,
BufferLocationINTEL = 5921,
IOPipeStorageINTEL = 5944,
FunctionFloatingPointModeINTEL = 6080,
@@ -1101,6 +1104,7 @@ namespace Spv
FPGAClusterAttributesINTEL = 5904,
LoopFuseINTEL = 5906,
MemoryAccessAliasingINTEL = 5910,
+ FPGAInvocationPipeliningAttributesINTEL = 5916,
FPGABufferLocationINTEL = 5920,
ArbitraryPrecisionFixedPointINTEL = 5922,
USMStorageClassesINTEL = 5935,
diff --git a/include/spirv/unified1/spirv.h b/include/spirv/unified1/spirv.h
index f744938..51e4dca 100644
--- a/include/spirv/unified1/spirv.h
+++ b/include/spirv/unified1/spirv.h
@@ -566,6 +566,9 @@ typedef enum SpvDecoration_ {
SpvDecorationFuseLoopsInFunctionINTEL = 5907,
SpvDecorationAliasScopeINTEL = 5914,
SpvDecorationNoAliasINTEL = 5915,
+ SpvDecorationInitiationIntervalINTEL = 5917,
+ SpvDecorationMaxConcurrencyINTEL = 5918,
+ SpvDecorationPipelineEnableINTEL = 5919,
SpvDecorationBufferLocationINTEL = 5921,
SpvDecorationIOPipeStorageINTEL = 5944,
SpvDecorationFunctionFloatingPointModeINTEL = 6080,
@@ -1101,6 +1104,7 @@ typedef enum SpvCapability_ {
SpvCapabilityFPGAClusterAttributesINTEL = 5904,
SpvCapabilityLoopFuseINTEL = 5906,
SpvCapabilityMemoryAccessAliasingINTEL = 5910,
+ SpvCapabilityFPGAInvocationPipeliningAttributesINTEL = 5916,
SpvCapabilityFPGABufferLocationINTEL = 5920,
SpvCapabilityArbitraryPrecisionFixedPointINTEL = 5922,
SpvCapabilityUSMStorageClassesINTEL = 5935,
diff --git a/include/spirv/unified1/spirv.hpp b/include/spirv/unified1/spirv.hpp
index b789c76..d199bb1 100644
--- a/include/spirv/unified1/spirv.hpp
+++ b/include/spirv/unified1/spirv.hpp
@@ -562,6 +562,9 @@ enum Decoration {
DecorationFuseLoopsInFunctionINTEL = 5907,
DecorationAliasScopeINTEL = 5914,
DecorationNoAliasINTEL = 5915,
+ DecorationInitiationIntervalINTEL = 5917,
+ DecorationMaxConcurrencyINTEL = 5918,
+ DecorationPipelineEnableINTEL = 5919,
DecorationBufferLocationINTEL = 5921,
DecorationIOPipeStorageINTEL = 5944,
DecorationFunctionFloatingPointModeINTEL = 6080,
@@ -1097,6 +1100,7 @@ enum Capability {
CapabilityFPGAClusterAttributesINTEL = 5904,
CapabilityLoopFuseINTEL = 5906,
CapabilityMemoryAccessAliasingINTEL = 5910,
+ CapabilityFPGAInvocationPipeliningAttributesINTEL = 5916,
CapabilityFPGABufferLocationINTEL = 5920,
CapabilityArbitraryPrecisionFixedPointINTEL = 5922,
CapabilityUSMStorageClassesINTEL = 5935,
diff --git a/include/spirv/unified1/spirv.hpp11 b/include/spirv/unified1/spirv.hpp11
index 02d615f..8bf4a9e 100644
--- a/include/spirv/unified1/spirv.hpp11
+++ b/include/spirv/unified1/spirv.hpp11
@@ -562,6 +562,9 @@ enum class Decoration : unsigned {
FuseLoopsInFunctionINTEL = 5907,
AliasScopeINTEL = 5914,
NoAliasINTEL = 5915,
+ InitiationIntervalINTEL = 5917,
+ MaxConcurrencyINTEL = 5918,
+ PipelineEnableINTEL = 5919,
BufferLocationINTEL = 5921,
IOPipeStorageINTEL = 5944,
FunctionFloatingPointModeINTEL = 6080,
@@ -1097,6 +1100,7 @@ enum class Capability : unsigned {
FPGAClusterAttributesINTEL = 5904,
LoopFuseINTEL = 5906,
MemoryAccessAliasingINTEL = 5910,
+ FPGAInvocationPipeliningAttributesINTEL = 5916,
FPGABufferLocationINTEL = 5920,
ArbitraryPrecisionFixedPointINTEL = 5922,
USMStorageClassesINTEL = 5935,
diff --git a/include/spirv/unified1/spirv.json b/include/spirv/unified1/spirv.json
index bfe8679..281219c 100644
--- a/include/spirv/unified1/spirv.json
+++ b/include/spirv/unified1/spirv.json
@@ -588,6 +588,9 @@
"FuseLoopsInFunctionINTEL": 5907,
"AliasScopeINTEL": 5914,
"NoAliasINTEL": 5915,
+ "InitiationIntervalINTEL": 5917,
+ "MaxConcurrencyINTEL": 5918,
+ "PipelineEnableINTEL": 5919,
"BufferLocationINTEL": 5921,
"IOPipeStorageINTEL": 5944,
"FunctionFloatingPointModeINTEL": 6080,
@@ -1077,6 +1080,7 @@
"FPGAClusterAttributesINTEL": 5904,
"LoopFuseINTEL": 5906,
"MemoryAccessAliasingINTEL": 5910,
+ "FPGAInvocationPipeliningAttributesINTEL": 5916,
"FPGABufferLocationINTEL": 5920,
"ArbitraryPrecisionFixedPointINTEL": 5922,
"USMStorageClassesINTEL": 5935,
diff --git a/include/spirv/unified1/spirv.lua b/include/spirv/unified1/spirv.lua
index 0fbff05..2eca531 100644
--- a/include/spirv/unified1/spirv.lua
+++ b/include/spirv/unified1/spirv.lua
@@ -535,6 +535,9 @@ spv = {
FuseLoopsInFunctionINTEL = 5907,
AliasScopeINTEL = 5914,
NoAliasINTEL = 5915,
+ InitiationIntervalINTEL = 5917,
+ MaxConcurrencyINTEL = 5918,
+ PipelineEnableINTEL = 5919,
BufferLocationINTEL = 5921,
IOPipeStorageINTEL = 5944,
FunctionFloatingPointModeINTEL = 6080,
@@ -1059,6 +1062,7 @@ spv = {
FPGAClusterAttributesINTEL = 5904,
LoopFuseINTEL = 5906,
MemoryAccessAliasingINTEL = 5910,
+ FPGAInvocationPipeliningAttributesINTEL = 5916,
FPGABufferLocationINTEL = 5920,
ArbitraryPrecisionFixedPointINTEL = 5922,
USMStorageClassesINTEL = 5935,
diff --git a/include/spirv/unified1/spirv.py b/include/spirv/unified1/spirv.py
index af23595..5c56ec3 100644
--- a/include/spirv/unified1/spirv.py
+++ b/include/spirv/unified1/spirv.py
@@ -535,6 +535,9 @@ spv = {
'FuseLoopsInFunctionINTEL' : 5907,
'AliasScopeINTEL' : 5914,
'NoAliasINTEL' : 5915,
+ 'InitiationIntervalINTEL' : 5917,
+ 'MaxConcurrencyINTEL' : 5918,
+ 'PipelineEnableINTEL' : 5919,
'BufferLocationINTEL' : 5921,
'IOPipeStorageINTEL' : 5944,
'FunctionFloatingPointModeINTEL' : 6080,
@@ -1059,6 +1062,7 @@ spv = {
'FPGAClusterAttributesINTEL' : 5904,
'LoopFuseINTEL' : 5906,
'MemoryAccessAliasingINTEL' : 5910,
+ 'FPGAInvocationPipeliningAttributesINTEL' : 5916,
'FPGABufferLocationINTEL' : 5920,
'ArbitraryPrecisionFixedPointINTEL' : 5922,
'USMStorageClassesINTEL' : 5935,
diff --git a/include/spirv/unified1/spv.d b/include/spirv/unified1/spv.d
index a63cdbe..a8c52b4 100644
--- a/include/spirv/unified1/spv.d
+++ b/include/spirv/unified1/spv.d
@@ -563,6 +563,9 @@ enum Decoration : uint
FuseLoopsInFunctionINTEL = 5907,
AliasScopeINTEL = 5914,
NoAliasINTEL = 5915,
+ InitiationIntervalINTEL = 5917,
+ MaxConcurrencyINTEL = 5918,
+ PipelineEnableINTEL = 5919,
BufferLocationINTEL = 5921,
IOPipeStorageINTEL = 5944,
FunctionFloatingPointModeINTEL = 6080,
@@ -1104,6 +1107,7 @@ enum Capability : uint
FPGAClusterAttributesINTEL = 5904,
LoopFuseINTEL = 5906,
MemoryAccessAliasingINTEL = 5910,
+ FPGAInvocationPipeliningAttributesINTEL = 5916,
FPGABufferLocationINTEL = 5920,
ArbitraryPrecisionFixedPointINTEL = 5922,
USMStorageClassesINTEL = 5935,