Age | Commit message (Collapse) | Author |
|
Also from now on QEMU start to use formal guestfwd interface function.
slirp_add_guestxfwd().
Change-Id: I7d1acdcdb99bcf26b34cbaf623ef7b5ed37c1019
Signed-off-by: Felix Wu <flwu@google.com>
|
|
The IRQ lines weren't being iterated over, so if an interrupt for the
first mailbox would go off, it would raise interrupts for all mailboxes.
Change-Id: Ie6bb15021666eb11e48a89236f987cbc6d8e2971
Signed-off-by: Joe Komlodi <komlodi@google.com>
|
|
The previous logic uses QEMU char-socket backend and the
datapath is broken. Now we pass both the server and target
addresses to libslirp.
Google-Rebase-Count: 2
Change-Id: I17e75321599cb8fd6e94c8d1889a43b3666f1fae
Signed-off-by: Felix Wu <flwu@google.com>
(cherry picked from commit 2afe8041776f7d5eb44fdc2abf961b14357daa2a)
|
|
Add missing vmstate support.
Google-Bug-Id: 262982133
Google-Rebase-Count: 4
PiperOrigin-RevId: 480417360
Change-Id: I11a7e4a06544423c608ab639f259579f39225113
Signed-off-by: Patrick Venture <venture@google.com>
|
|
TESTED: temperature_pwr_a_hswap_temp is now available in redfish
Google-Bug-Id: 289396868
Signed-off-by: Titus Rwantare <titusr@google.com>
Change-Id: Ie6f8b60f8e348980a899410c843da01a0bc54ad5
(cherry picked from commit 023e3637022521cb99c69fa282e61d96f3769687)
|
|
trace_npcm_gmac_packet_transmit seems to have been added for some
testing but the trace itself doesn't give any useful information since
the canonical length at that point in the code will always be 0.
Removing the trace since its not useful.
Google-Rebase-Count: 2
Change-Id: I34581124b3bbd460929799b752c0d5a5438fc403
Signed-off-by: Nabih Estefan <nabihestfean@google.com>
Google-Bug-Id: 304531324
(cherry picked from commit 4c54ad293a06fd688b7832ae678af2dfe665ca51)
|
|
Fix the following 2 problems in GMAC receive function:
1. When kernel driver disables GMAC RX interrupt and all descriptors
are full, it will not send further interrupt to the kernel
driver as the driver doesn't listen to NPCM_DMA_STATUS_RU.
Since descriptors full indicates that there are packets received
we should also set NPCM_DMA_STATUS_RI for firing the interrupt.
2. Kernel driver does not clear rdes0 from used descriptor so we need
to clear it such that old flags are removed before setting new
flags.
Google-Rebase-Count: 2
Signed-off-by: Hao Wu <wuhaotsh@google.com>
Google-Bug-Id: 304808281
Change-Id: I4e07bdccffb5f375b4d4f00236faeb155ebf9330
(cherry picked from commit b3e859dff11d4070bffebe737875883b678fe51b)
(cherry picked from commit d14e76aa5fc108e5dcadfc3d85a5c14cd22a7ed7)
|
|
RX should stop receiving when a descriptor is owned by software
but currently implementation made it reversed (owned by DMA) instead.
Google-Rebase-Count: 2
Signed-off-by: Hao Wu <wuhaotsh@google.com>
Google-Bug-Id: 304320983
Change-Id: I2507c4dafe345de3b6fb7701a66ea26924da7561
(cherry picked from commit 7f27fd2eb48aa6c701dcd39fb471f30418a7fb92)
|
|
Google-Rebase-Count: 2
Google-Bug-Id: 297909423
Signed-off-by: Titus Rwantare <titusr@google.com>
Change-Id: Ia98086ab3413cd2edd3dd7bb76cc80133afacd87
(cherry picked from commit 9e90fda43a10371e75540ba67dc83d73d75ea262)
|
|
There was a bug that frame_ptr wasn't updated after receiving
the first batch of data, causing the received data to be wrong
when the frame is too large.
Google-Rebase-Count: 2
Signed-off-by: Hao Wu <wuhaotsh@google.com>
Google-Bug-Id: 304320983
Change-Id: I60c435e36f3b90fe83c7d0355627222a5e4a2237
(cherry picked from commit ac617b7add852d2e656d23db93c14b9a7d8b670c)
|
|
TESTED=npcm7xx timer test passes
Google-Rebase-Count: 1
Google-Bug-Id: 302374054
Signed-off-by: Titus Rwantare <titusr@google.com>
Change-Id: Ic5acf01dfe09704812dd3286d817688ff737443c
(cherry picked from commit 067828c327b6c12b6867095ee4e65f977aa6c40f)
(cherry picked from commit 34d27e6d2dde3425d35854b2b65a79de4c9d73a9)
|
|
Effectively this allows QEMU to receive and drop incoming packets when
RX descriptors are full. Similar to EMC, this lets GMAC to drop packets
faster, especially during bootup sequence.
Google-Rebase-Count: 1
Change-Id: I9bffbed76699cde6aca54e22dee53e04b875bfc1
(cherry picked from commit 10fe2820481921dbac169859b1151fa8fa6b3241)
Signed-off-by: Hao Wu <wuhaotsh@google.com>
|
|
- Add PCS Register check to npcm_gmac-test
Google-Rebase-Count: 4
Google-Bug-Id: 235261135
Signed-off-by: Nabih Estefan Diaz <nabihestefan@google.com>
Change-Id: Ie6cdf8dd208ac191902f1e5ef2b1b5ad4aea0aa8
|
|
We don't build the arm platform anymore, as aarch64 is a strict
superset.
Make it so that we still build the tests we care about.
Google-Rebase-Count: 4
Google-Bug-Id: 263132831
Google-Bug-Id: 218508470
Change-Id: Ib3fb16a9c352a52a0f23f6f8ca24fc5304639a61
Signed-off-by: Peter Foley <pefoley@google.com>
|
|
Split out the aspeed init flashes method into a loop calling a per flash
method.
Note: I don't think upstream will accept this patch because it's a
needless refactor if you don't support a remote spi device.
Google-Bug-Id: 206807404
Google-Bug-Id: 343800057
Signed-off-by: Patrick Venture <venture@google.com>
Change-Id: Ifdb7cfdeeb479fdc88b0d602dd905afd03fdf58d
|
|
When RX descriptor list is full, it returns a DMA_STATUS for software
to handle it. But there's no way to indicate the software has handled
all RX descriptors and the whole pipeline stalls.
We do something similar to NPCM7XX EMC to handle this case.
1. Return packet size when RX descriptor is full, effectively dropping
these packets in such a case.
2. When software clears RX descriptor full bit, continue receiving
further packets by flushing QEMU packet queue.
Google-Rebase-Count: 2
Google-Bug-Id: 290656372
BUG=290656372
PiperOrigin-RevId: 554534796
Change-Id: I3fcfd3e0371a2479000746ed3a6eb8a6769ec008
Signed-off-by: Hao Wu <wuhaotsh@google.com>
|
|
When RX starts, we need to flush the queued packets so that they
can be received by the GMAC device. Without this it won't work
with TAP NIC device.
Google-Rebase-Count: 2
Signed-off-by: Hao Wu <wuhaotsh@google.com>
Google-Bug-Id: 294454904
Change-Id: I31fe64a440b9079d67b6a55c11d4d5f017da89c7
|
|
Use the same way of connecting to chardev backend for NPCM7XX SoCs
as the EMC module and 8XX mailboxes.
Google-Rebase-Count: 2
Signed-off-by: Hao Wu <wuhaotsh@google.com>
Google-Bug-Id: 290366550
Change-Id: I684923d6d5fcfc11c45d877820ca3a79542d168b
|
|
As NPCM8XX SoCs have 2 mailboxes, we can't use -global to connect
the mailboxes to their specific chardevs. So we add the search
for chardev code here, similar to what we did for the GMAC devices.
Google-Rebase-Count: 2
Signed-off-by: Hao Wu <wuhaotsh@google.com>
Google-Bug-Id: 290366550
Change-Id: I9c1359d1a8514af1164c79238885e60952fcf385
|
|
Google-Rebase-Count: 2
Change-Id: I7c0b5a9db99ada2827b2c061a58ca3fe16d29f34
Signed-off-by: Felix Wu <flwu@google.com>
|
|
This function is called when closing underlying chardev. If we don't
have it QEMU will segfault during exiting.
Google-Rebase-Count: 2
Google-Bug-Id: 288265202
Signed-off-by: Hao Wu <wuhaotsh@google.com>
Change-Id: I951a34f51097778e6a8a36d34801a4c86a28553a
|
|
Current implementation only supports checksum for IPv4. We add IPv6
support in this patch.
Google-Rebase-Count: 2
Signed-off-by: Hao Wu <wuhaotsh@google.com
Google-Bug-Id: 237557100
Change-Id: I2474724b32d6f62026a84a5e30ff67b90081a42b
|
|
- Implementation of Transmit function for packets
- Implementation for reading and writing from and to descriptors in
memory for Tx
NOTE: This function implements the steps detailed in the datasheet for
transmitting messages from the GMAC.
Google-Rebase-Count: 2
Google-Bug-Id: 168914186
Signed-off-by: Nabih Estefan Diaz <nabihestefan@google.com>
Change-Id: Id9995430a3816edcc25662a3e9e2312186e3897a
|
|
- Implementation of Receive function for packets
- Implementation for reading and writing from and to descriptors in
memory for Rx
NOTE: At this point in development we believe this function is working
as intended, and the kernel supports these findings, but we need the
Transmit function to work before we upload
Google-Rebase-Count: 2
Google-Bug-Id: 168914186
Signed-off-by: Nabih Estefan Diaz <nabihestefan@google.com>
Change-Id: I96941d4d43945d0ed64a8701eba8888fd323a0b2
|
|
- General GMAC Register handling
- GMAC IRQ Handling
- Added traces in some methods for debugging
- Lots of declarations for accessing information on GMAC Descriptors (npcm_gmac.h file)
NOTE: With code on this state, the GMAC can boot-up properly and will show up in the ifconfig command on the BMC
Google-Rebase-Count: 2
Signed-off-by: Nabih Estefan Diaz <nabihestefan@google.com>
Google-Bug-Id: 237557100
Change-Id: I3a4332ee5bab31b919782031a77c5b943f45ca2f
|
|
This change makes NPCM GMAC module to use BCM54612E unconditionally
and make some fake PHY registers such that the kernel driver thinks
the link partner is up.
Tested:
The following message shows up with the change:
Broadcom BCM54612E stmmac-0:00: attached PHY driver [Broadcom BCM54612E] (mii_bus:phy_addr=stmmac-0:00, irq=POLL)
stmmaceth f0802000.eth eth0: Link is Up - 1Gbps/Full - flow control rx/tx
Google-Rebase-Count: 2
Signed-off-by: Hao Wu <wuhaotsh@google.com>
Google-Bug-Id: 237557100
Change-Id: Ib9a8aa2b7195177801c5e79f79ec37f6eeee58bc
|
|
Google-Bug-Id: 175641871
Signed-off-by: Hao Wu <wuhaotsh@google.com>
Change-Id: I8d546788c4baa0bb48312c2ce6109e2d5761ed0b
|
|
This can have a non-zero reset value, and cause the kernel to complain
about a CNTFRQ mismatch if TF-A (or firmware in general) does not
initialize it (because it expects the value to be non-zero out of
reset).
To fix this, we'll just add an object property that people can use to
initialize the CNTFRQ reset value.
Google-Rebase-Count: 3
Google-Bug-Id: 277794748
Signed-off-by: Joe Komlodi <komlodi@google.com>
Change-Id: Ie97d081403e8272d9186fefcf60996fe3a3d8921
|
|
This was missing a reset, so add one.
Google-Rebase-Count: 3
Google-Bug-Id: 231153633
Signed-off-by: Joe Komlodi <komlodi@google.com>
Change-Id: If09792a0b6fe273cf07d23e159faccade3a72be2
|
|
Both this and the parent class (SMBusDevice) do their variable resets on
entrance, so we need to explicity call its reset.
Google-Rebase-Count: 3
Google-Bug-Id: 231153633
Signed-off-by: Joe Komlodi <komlodi@google.com>
Change-Id: Icf46d90b4a318d5888acba823935a53bc03c006f
|
|
When a reset happens, both the SMBusDevice and PCA954x class do their
variable resetting on an enter reset. Because of this, only the PCA954x
has its reset called, which can leave the SMBusDevice in a bad state if
it was in the middle of a transaction.
To fix this we add parent reset functions for the SMBusDevice class, and
have the mux class invoke it when it resets.
Google-Rebase-Count: 3
Google-Bug-Id: 231153633
Signed-off-by: Joe Komlodi <komlodi@google.com>
Change-Id: I50bb22b36ba2547e56fd8311b6a5bf8644612710
|
|
When the NPCM SMBus module gets disabled, it stops SCL and transmitting
data, bringing both lines high. This can be interpreted as an I2C STOP
from the target.
In practice, what happens is when Linux thinks the bus is stuck, it will
disable and re-enable the bus to get it into a known state. If this
happens in the middle of a transaction with an SMBus device, the SMBus
device is left in its old state. This means when a new transaction
comes, the SMBus device is now confused and will become unresponsive
until reset.
To fix this, we'll model the I2C stop that's incidentally sent when the
controller is disabled.
Google-Rebase-Count: 3
Google-Bug-Id: 231153633
Signed-off-by: Joe Komlodi <komlodi@google.com>
Change-Id: I9bdf8d468243a8d1ac38f898fe1d46e34260b9be
|
|
Origin: 7becd0d774f316608eca1d4480adbcc0d425d8c0
Origin: 73daf3a929f2df71e912c363288b20c43f1459cc
Google-Rebase-Count: 5
Google-Bug-Id: 229123628
Google-Bug-Id: 279667071
PiperOrigin-RevId: 441617908
Change-Id: Ia41353049aa4e1ccf867d2258b89694909687353
Signed-off-by: Patrick Venture <venture@google.com>
|
|
The path check assumes that the paths would be posix paths. This is not
true when the scripts are running on Windows, causing:
- Access violations (concurrent writes to the same file)
- Creation of wrong header files.
We now use the proper separator, making sure it works on all platforms.
Signed-off-by: Erwin Jansen <jansene@google.com>
Change-Id: I94935534306fd8e5799718f6b08992ee055c89ae
|
|
When building with --enable-debug, the compiler will throw a linker error
unless these are declared as static inline.
My best guess for why this happens is because the compiler doesn't inline them
with --enable-debug passed in, and tries to create a normal function call for
the functions.
Then when the linker is called, the functions aren't present in any object
files and the linker becomes unhappy.
With static, we ensure that the functions are built as a part of the object
files.
PiperOrigin-RevId: 401096296
Google-Rebase-Count: 6
Signed-off-by: Joe Komlodi <komlodi@google.com>
Change-Id: I8d446f4d219475e5ad4c2d1c00822b8f0a220a2c
|
|
Change-Id: If4b5e5fe458cb7fef399d62d6f2884c33badb9a1
Google-Rebase-Count: 6
Signed-off-by: Shu-Chun Weng <scw@google.com>
Signed-off-by: Lirong Yuan <yuanzi@google.com>
|
|
Google-Rebase-Count: 4
Google-Bug-Id: 262949356
Google-Bug-Id: 173797045
Signed-off-by: Titus Rwantare <titusr@google.com>
Change-Id: I7f68aa996ac3f176a9396c84ab8c79043222c3e4
|
|
Bring up NVME ctrl with param:
override_vendor_id=0x1344
Result in lspci:
00:05.0 Non-Volatile memory controller: Micron Technology Inc Device 0010 (rev 02)
Google-Bug-Id: 260904508
Change-Id: I7bf8689b14dcf075d90ab0f82cb8ee051de0f3b4
Signed-off-by: Jason Fan <fanjason@google.com>
|
|
Currently NPCM845 EVB image uses a 64MB flash and this flash type
is compatible with it.
Tested that recent NPCM845 EVB image can boot up with this change.
Google-Rebase-Count: 3
Signed-off-by: Hao Wu <wuhaotsh@google.com>
Change-Id: Ib710bf507e6ae18c4b91b1be300586bf78a0e91b
|
|
Tested:
manually copied changes to google3:
blaze test -c opt --cpu=arm \
//platforms/system_modeling/testing/platforms/conan:smoke_test
http://sponge2/2aaf1ca8-808f-461b-bdb6-7c96568f4540
Google-Rebase-Count: 2
Google-Bug-Id: 263532031
Google-Bug-Id: 175409898
Google-Bug-Id: 258679933
Google-Bug-Id: 261895337
Change-Id: I73d790394eeaddffce167e5976db20e6521241e1
Signed-off-by: Chris Rauer <crauer@google.com>
|
|
Google-Rebase-Count: 3
Google-Bug-Id: 263532482
Google-Bug-Id: 175409898
Google-Bug-Id: 258679933
Google-Bug-Id: 261895337
Change-Id: Iac1093e8b275e34e61752ef5ae89afa8334a08da
Signed-off-by: Chris Rauer <crauer@google.com>
|
|
- some fixes are applied.
- https://patchwork.kernel.org/project/qemu-devel/patch/20221116084312.35808-3-its@irrelevant.dk/
Google-Bug-Id: 263535638
Change-Id: I352ddf7d7ecb50a42371826be4525f75889fdcb6
Signed-off-by: Felix Wu <flwu@google.com>
|
|
It's possible for a reset to come while we're handling a packet, so we
should reset the packet state as well.
Google-Rebase-Count: 4
Google-Bug-Id: 262945649
Signed-off-by: Joe Komlodi <komlodi@google.com>
Change-Id: I86793f69722d0d6d31c13e3f16a2e129b0915c95
|
|
If the chr_event is called but the interface is still a null pointer, report this as an error and exit.
Note: This cannot go upstream until our IPMI refactors land upstream.
Google-Rebase-Count: 4
Google-Bug-Id: 258823045
PiperOrigin-RevId: 489551186
Change-Id: I28981b2282444a324440c1ea53d276d18fbd75b1
Signed-off-by: Patrick Venture <venture@google.com>
|
|
This patches adds a qtest for NPCM7XX PCI Mailbox module.
It sends read and write requests to the module, and verifies that
the module contains the correct data after the requests.
Google-Rebase-Count: 6
Google-Bug-Id: 262937526
Signed-off-by: Hao Wu <wuhaotsh@google.com>
Change-Id: Ibde9897e199c948dde645a78c072614753ce7c74
|
|
Origin: afa81d63e3b4eed5c713ab76be87c62e889323ec
Origin: 19f02b7a972b1a4476f9a65c87756eaa4c29fac9
Chris Rauer (2):
hw/arm: Enable smbus on arm virt machine.
hw/arm: Fix issue with smbus ACPI when smbus is not enabled.
Google-Rebase-Count: 5
Google-Bug-Id: 175409898
Google-Bug-Id: 204205056
Change-Id: I2c360e824249ff436ed6fac4e981a5a8f2b04993
Signed-off-by: Chris Rauer <crauer@google.com>
|
|
Google-Bug-Id: 262974283
Google-Rebase-Count: 6
Signed-off-by: Doug Evans <dje@google.com>
Change-Id: Ida489a15cad4c8245e6a81dd281e62a26b0caee7
|
|
Net option "-hostfwd" now supports IPv6 addresses.
Commands hostfwd_add, hostfwd_remove now support IPv6 addresses.
Tested:
avocado run tests/acceptance/hostfwd.py
Origin: 8f008fd3a3b55c4d0b5318b382b7cb3275801b66
Origin: af54b611ac3ce63a5328a1f2767842265700795a
Google-Bug-Id: 262974436
Google-Bug-Id: 262974278
Google-Rebase-Count: 6
Signed-off-by: Doug Evans <dje@google.com>
Change-Id: Idfed2392fa966dd3f11d9b6a81883585fd3da0bd
|
|
... in preparation for adding ipv6 host forwarding support.
Tested:
avocado run tests/acceptance/hostfwd.py
Google-Bug-Id: 262974434
Google-Rebase-Count: 6
Signed-off-by: Doug Evans <dje@google.com>
Change-Id: I33e0e7a264f24932d8ca58a8d6b192792307c5cd
|
|
"[]" is a valid spelling of the empty host address "".
Google-Bug-Id: 262973975
Google-Rebase-Count: 6
Signed-off-by: Doug Evans <dje@google.com>
Change-Id: Icdabf942c237fe4eff5f389b9093c5440a8e5386
|