diff options
author | Rob Clark <robdclark@chromium.org> | 2022-07-20 14:24:23 -0700 |
---|---|---|
committer | Chromeos LUCI <chromeos-scoped@luci-project-accounts.iam.gserviceaccount.com> | 2024-02-01 17:40:19 +0000 |
commit | 958cd774ae1afe3daf688ee3dd0ca221b1cfa121 (patch) | |
tree | 9261c5059c7e0e6f3a08a160e0097ea49ce411e2 | |
parent | e81321da13f65d3a0ff0910d66f4732c641a8179 (diff) | |
download | minigbm-958cd774ae1afe3daf688ee3dd0ca221b1cfa121.tar.gz |
minigbm: Add an API to return cache attributes
Crosvm currently makes the simplistic assumption that if driver==i915
then cached mappings to guest should be used for minigbm allocated
buffers. But this may not always be the correct choice. And other
drivers can do cached mappings to, in certain cases. But on ARM devices
in particular, we should be consistent in cachability when it comes to
CPU mappings. So add a new minigbm API which crosvm can use to
determine how to map to guest.
BUG=b:239718180, b:306548532
TEST=no artifact in Camera FOV Calibration of CtsVerifier on rex
Change-Id: I5c9b6346270f6a2eb83e6637a911f2153f6120ff
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/minigbm/+/3777567
Tested-by: Chia-I Wu <olv@google.com>
Auto-Submit: Rob Clark <robdclark@chromium.org>
Reviewed-by: Yiwei Zhang <zzyiwei@chromium.org>
Commit-Queue: Chia-I Wu <olv@google.com>
-rw-r--r-- | drv.c | 5 | ||||
-rw-r--r-- | drv.h | 2 | ||||
-rw-r--r-- | drv_priv.h | 1 | ||||
-rw-r--r-- | gbm.c | 7 | ||||
-rw-r--r-- | gbm.h | 18 | ||||
-rw-r--r-- | i915.c | 8 |
6 files changed, 41 insertions, 0 deletions
@@ -587,6 +587,11 @@ out: return ret; } +bool drv_bo_cached(struct bo *bo) +{ + return bo->meta.cached; +} + int drv_bo_invalidate(struct bo *bo, struct mapping *mapping) { int ret = 0; @@ -176,6 +176,8 @@ void *drv_bo_map(struct bo *bo, const struct rectangle *rect, uint32_t map_flags int drv_bo_unmap(struct bo *bo, struct mapping *mapping); +bool drv_bo_cached(struct bo *bo); + int drv_bo_invalidate(struct bo *bo, struct mapping *mapping); int drv_bo_flush(struct bo *bo, struct mapping *mapping); @@ -27,6 +27,7 @@ struct bo_metadata { uint64_t format_modifier; uint64_t use_flags; size_t total_size; + bool cached; /* * Most of the following metadata is virtgpu cross_domain specific. However, that backend @@ -267,6 +267,13 @@ PUBLIC void *gbm_bo_map(struct gbm_bo *bo, uint32_t x, uint32_t y, uint32_t widt return gbm_bo_map2(bo, x, y, width, height, transfer_flags, stride, map_data, 0); } +PUBLIC enum gbm_bo_map_cache_mode gbm_bo_get_map_info(struct gbm_bo *bo) +{ + if (drv_bo_cached(bo->bo)) + return GBM_BO_MAP_CACHE_CACHED; + return GBM_BO_MAP_CACHE_WC; +} + PUBLIC void gbm_bo_unmap(struct gbm_bo *bo, void *map_data) { assert(bo); @@ -403,6 +403,24 @@ gbm_bo_map(struct gbm_bo *bo, uint32_t x, uint32_t y, uint32_t width, uint32_t height, uint32_t flags, uint32_t *stride, void **map_data); +/** + * Enum to indicate the cache attributes of CPU mapping returned by + * gbm_bo_map() + * + * Note that definition aligns with VIRTIO_GPU_MAP_CACHE_*, RUTABAGA_MAP_CACHE_*, + * and VIRGL_RENDERER_MAP_CACHE_* (but skipping the _NONE and _UNCACHED values as + * those don't actually make sense to use). + */ +enum gbm_bo_map_cache_mode { + /*GBM_BO_MAP_CACHE_NONE = 0,*/ + GBM_BO_MAP_CACHE_CACHED = 1, + /*GBM_BO_MAP_CACHE_UNCACHED = 2,*/ + GBM_BO_MAP_CACHE_WC = 3, +}; + +enum gbm_bo_map_cache_mode +gbm_bo_get_map_info(struct gbm_bo *bo); + void gbm_bo_unmap(struct gbm_bo *bo, void *map_data); @@ -901,6 +901,14 @@ static int i915_bo_create_from_metadata(struct bo *bo) return -errno; } } + + /* + * TODO this matches existing crosvm rutabaga_gfx/src/rutabaga_gralloc/minigbm.rs + * which assumes that if device_name == "i915" the buffer should be mapped cached + * into the guest. But perhaps better decisions should be made. + */ + bo->meta.cached = true; + return 0; } |